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SN74AUC2G79 Datasheet Dual Positive-edge-triggered D-type Flip-flop

Manufacturer: Texas Instruments

Overview: .ti. SN74AUC2G79 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP SCES536C – DECEMBER 2003 – REVISED JANUARY.

General Description

/ORDERING INFORMATION This single positive-edge-triggered D-type flip-flop is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse.

Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse.

Key Features

  • Available in the Texas Instruments NanoFree™ Package.
  • Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation.
  • Ioff Supports Partial Power-Down-Mode Operation.
  • Sub-1-V Operable.
  • Max tpd of 1.9 ns at 1.8 V.
  • Low Power Consumption, 10-µA Max ICC.
  • ±8-mA Output Drive at 1.8 V.
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II.
  • ESD Performance Tested Per JESD 22.

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