SN74F109 datasheet by Texas Instruments.
| Part number | SN74F109 |
|---|---|
| Datasheet | SN74F109-etcTI.pdf |
| File Size | 586.73 KB |
| Manufacturer | Texas Instruments |
| Description | DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOP |
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These devices contain two independent J-K positive-edge-triggered flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the J and K input meeting the setup-time requirements are transferred to the outputs on the positive-going edge of the clock pulse.
View all Texas Instruments datasheets
| Part Number | Description |
|---|---|
| SN74F10 | TRIPLE 3-INPUT POSITIVE-NAND GATE |
| SN74F1016 | 16-Bit Schottky Barrier Diode RC Bus-Termination Array |
| SN74F1056 | 8-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY |
| SN74F11 | Triple 3-Input AND Gate |
| SN74F112 | DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP |
| SN74F125 | QUADRUPLE BUS BUFFER GATE |
| SN74F126 | QUADRUPLE BUS BUFFER GATE |
| SN74F138 | 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS |
| SN74F151B | 1-of-8 Data Selector/Multiplexer |
| SN74F153 | Dual 1-of-4 Data Selectors/Multiplexer |
