SN74F112 datasheet by Texas Instruments.
| Part number | SN74F112 |
|---|---|
| Datasheet | SN74F112-etcTI.pdf |
| File Size | 666.05 KB |
| Manufacturer | Texas Instruments |
| Description | DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP |
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The SN74F112 contains two independent J-K negative-edge-triggered flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the J and K inputs meeting the setup time requirements is transferred to the outputs on the negative-going edge of the clock pulse.
View all Texas Instruments datasheets
| Part Number | Description |
|---|---|
| SN74F11 | Triple 3-Input AND Gate |
| SN74F10 | TRIPLE 3-INPUT POSITIVE-NAND GATE |
| SN74F1016 | 16-Bit Schottky Barrier Diode RC Bus-Termination Array |
| SN74F1056 | 8-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY |
| SN74F109 | DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOP |
| SN74F125 | QUADRUPLE BUS BUFFER GATE |
| SN74F126 | QUADRUPLE BUS BUFFER GATE |
| SN74F138 | 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS |
| SN74F151B | 1-of-8 Data Selector/Multiplexer |
| SN74F153 | Dual 1-of-4 Data Selectors/Multiplexer |
