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SN74HC03 - Quadruple 2-Input NAND Gates

General Description

This device contains four independent 2-input NAND Gates with open-drain outputs.

Each gate performs the Boolean function Y = A ● B in positive logic.

Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) SN74HC03N PDIP (14) 19.30 mm × 6.40 mm SN74HC03NS SO (14) 10.20 mm × 5.30 mm SN74HC03D SOIC (14) 8.70 mm × 3.90 mm SN74HC03PW TSSOP (14) 5.00 mm × 4.40 mm SN54HC03J CDIP (14) 21.30 mm × 7.60 mm SN54HC03FK LCCC (20) 8.9 mm × 8.90 mm (1) For all available packages, see the orderable addendum at the end of the data sheet.

Overview

www.ti.com SCLS077F – MARCHSS1NN9855444–HHRCCEV00I33S,,ESSDNNAP77R44IHHL CC20002331 SCLS077F – MARCH 1984 – REVISED APRIL 2021 SNx4HC03 Quadruple 2-Input NAND Gates with Open-Drain Outputs.

Key Features

  • Wide Operating Voltage Range: 2 V to 6 V.
  • Outputs Can Drive Up To 10 LSTTL Loads.
  • Low Power Consumption, 20-µA Maximum ICC.
  • Typical tpd = 8 ns at 5 V.
  • ±4-mA Output Drive at 5 V.
  • Low Input Current of 1 µA 2.