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SN74HCT125 - Quadruple Bus Buffer Gates

General Description

The SNx4HCT125 contains four independent buffers with TTL-compatible inputs and 3-state outputs.

Each gate performs the Boolean function Y = A in positive logic.

Key Features

  • Operating voltage range of 4.5 V to 5.5 V.
  • High-current can drive up to 15 LSTTL loads.
  • Low power consumption, 80-µA max ICC.
  • Typical tpd = 12 ns.
  • ±6-mA output drive at 5 V.
  • Low input current of 1 µA max.
  • Inputs are TTL-voltage compatible.
  • High-current 3-state outputs drive bus lines or buffer memory address registers 2.

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Other Datasheets by Texas Instruments

Part Number Description
SN74HCT125D Quadruple Bus Buffer Gates
SN74HCT125N Quadruple Bus Buffer Gates
SN74HCT138 3-Line to 8-Line Decoders/Demultiplexers
SN74HCT138D 3-Line to 8-Line Decoders/Demultiplexers
SN74HCT138N 3-Line to 8-Line Decoders/Demultiplexers

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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SN54HCT125, SN74HCT125 SCLS069G – NOVEMBER 1988 – REVISED OCTOBER 2022 SNx4HCT125 Quadruple Bus Buffer Gates With 3-State Outputs 1 Features • Operating voltage range of 4.5 V to 5.5 V • High-current can drive up to 15 LSTTL loads • Low power consumption, 80-µA max ICC • Typical tpd = 12 ns • ±6-mA output drive at 5 V • Low input current of 1 µA max • Inputs are TTL-voltage compatible • High-current 3-state outputs drive bus lines or buffer memory address registers 2 Description The SNx4HCT125 contains four independent buffers with TTL-compatible inputs and 3-state outputs. Each gate performs the Boolean function Y = A in positive logic. PART NUMBER SN74HCT125D SN74HCT125N Device Information PACKAGE(1) BODY SIZE (NOM) SOIC (14) 8.65 mm × 3.90 mm PDIP (14) 19.31 mm × 6.