SN74LV10A Description
These triple 3-input positive-NAND gates are designed for 2 V to 5.5 V VCC operation. The SN74LV10A devices perform the Boolean function Y = A B C in positive logic. These devices are fully specified for partial-power-down applications using Ioff.
SN74LV10A Key Features
- VCC operation of 2 V to 5.5 V
- Max tpd of 7 ns at 5 V
- Typical VOLP (Output Ground Bounce) <0.8 V at
- Typical VOHV (Output VOH Undershoot) >2.3 V at
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 100 mA Per JESD