SN74LVCH32373A Datasheet | Texas Instruments

Features - Member of the Texas Instruments Widebus+™ Family - Operates from 1.65 V to 3.6 V - Inputs accept voltages to 5.5 V - Max tpd of 4.2 ns at 3.3 V - Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C - Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, TA = 25°C - Ioff supports partial-power-down mode operation - Supports mixed-mode signal operation (5-V Input and output voltages with 3.3-V VCC) - Bus hold on data inputs eliminates the need for external pullup/pulldown resistors - Latch-up performance exceeds 250 m A per JESD 17 - ESD protection exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) 2 Applications - Buffer registers - I/O ports - Bidirectional bus drivers - Working registers 3 Description This 32-bit transparent D-type latch is designed for 1.65-V to 3.6-V VCC operation. The SN74LVCH32373A is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. It can be used as four 8-bit latches, two 16-bit latches, or one 32-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs. Device Information PART NUMBER PACKAGE(1) SN74LVCH32373AG KER LFBGA-GKE SN74LVCH32373AN MJR LFBGA-NMJ BODY SIZE (NOM) 13.50 mm × 5.00 mm 13.50 mm × 5.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. One of Four 8-Bit D-Type Latch Banks x OE x LE Q x...