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SN74LVCH32373A - 32-Bit Transparent D-Type Latch

Description

This 32-bit transparent D-type latch is designed for 1.65-V to 3.6-V VCC operation.

The SN74LVCH32373A is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

Features

  • Member of the Texas Instruments Widebus+™ Family.
  • Operates from 1.65 V to 3.6 V.
  • Inputs accept voltages to 5.5 V.
  • Max tpd of 4.2 ns at 3.3 V.
  • Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C.
  • Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, TA = 25°C.
  • Ioff supports partial-power-down mode operation.
  • Supports mixed-mode signal operation (5-V Input and output voltages with 3.3-V VCC).
  • B.

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Full PDF Text Transcription

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www.ti.com SN74LVCH32373A SCAS618E – OCTOBER 1998S–NR7E4VLIVSECDHJ3U2LY372032A0 SCAS618E – OCTOBER 1998 – REVISED JULY 2020 SN74LVCH32373A 32-Bit Transparent D-Type Latch With 3-State Outputs 1 Features • Member of the Texas Instruments Widebus+™ Family • Operates from 1.65 V to 3.6 V • Inputs accept voltages to 5.5 V • Max tpd of 4.2 ns at 3.3 V • Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, TA = 25°C • Ioff supports partial-power-down mode operation • Supports mixed-mode signal operation (5-V Input and output voltages with 3.
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