SN751516 Datasheet | Texas Instruments

description The SN751506 and the SN751516 are monolithic integrated circuits designed to drive the scan lines of a dc plasma panel display. The SN751516 pin sequence is reversed from the SN751506 for ease in printed-circuit-board layout. Each device consists of a 32-bit shift register and 32 OR gates. Serial data is entered into the shift register on the high-to-low transition of the clock input. When STROBE is low, all Q outputs are in the off state. Outputs are open-drain JFET transistors with a breakdown voltage in excess of 180 V. The outputs have a 220-m A sink current capability in the on state. Only one Q output should be allowed to be in the on state at a time. SERIAL OUT from the shift register can be used to cascade shift registers. This output is not affected by the STROBE input. All inputs are CMOS patible with ESD protection built in. The SN751506 and SN751516 are characterized for operation from 0°C to 70°C. SLDS034 - DECEMBER 1986 - REVISED JULY 1889 SN751506 . . . FT PACKAGE (TOP VIEW) Q32 1 48 Q31 2 47 Q30 3 46 Q29 4 45 Q28 5 44 Q27 6 43 Q26 7 42 Q25 8 41 Q24 9 40 Q23 10 39 Q22 11 38 Q21 12 37 Q20 13 36 Q19 14 35 Q18 15 34 Q17 16 33 NC 17 32 GND 18 31 NC 19 30 NC 20 29 CLOCK 21 28 VCC 22 27 NC 23 26 SERIAL OUT 24 25 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 Q13 Q14 Q15 Q16 NC GND NC STROBE NC VCC NC DATA IN SN751516 . . . FT PACKAGE (TOP VIEW) Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 Q13 Q14 Q15 Q16 NC GND NC STROBE NC VCC NC DATA IN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 Q32 47 Q31 46 Q30 45 Q29 44 Q28 43 Q27 42 Q26 41 Q25 40 Q24 39 Q23 38 Q22 37 Q21 36 Q20 35 Q19 34 Q18 33 Q17 32 NC 31 GND 30 NC 29 NC 28 CLOCK 27 VCC 26 NC 25 SERIAL OUT PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. - No internal connection Copyright  1989, Texas...