SN751518 Datasheet | Texas Instruments

description The SN751508 and SN751518 are monolithic integrated circuits designed to drive the data lines of a dc plasma panel display. The SN751518 pin sequence is reversed from the SN751508 for ease in printed-circuit-board layout. Each device consists of two 16-bit shift registers, 32 latches, 32 OR gates, and 32 pnp opencollector output AND gates. Typically, a 32-bit data string is split into two 16-bit data strings externally and then entered in parallel into the shift registers on the high-to-low transition of the clock signal. A high LATCH ENABLE transfers the data from the shift registers to the inputs of 32 OR gates through the latches. Data present in the latch during the high-to-low transition of LATCH ENABLE is stored. When STROBE is high, the latch is masked and a high is placed on the data input of the output AND gates. When STROBE is low and SUSTAIN is high, data from the latches is reflected at the outputs. When low, SUSTAIN forces all outputs to their off state. Drivers can be cascaded via the serial data outputs of the static shift registers. These outputs are not affected by LATCH ENABLE, STROBE, or SUSTAIN. The SN751508 and the SN751518 are characterized from 0°C to 70°C. SLDS035 - JANUARY 1987 - REVISED NOVEMBER 1989 SN751508 . . . FT PACKAGE (TOP VIEW) Q32 1 48 Q31 2 47 Q30 3 46 Q29 4 45 Q28 5 44 Q27 6 43 Q26 7 42 Q25 8 41 Q24 9 40 Q23 10 39 Q22 11 38 Q21 12 37 Q20 13 36 Q19 14 35 Q18 15 34 Q17 16 33 GND 17 32 NC 18 31 STROBE 19 30 NC 20 29 CLOCK 21 28 VCC 22 27 SERIAL OUT2 23 26 SERIAL OUT1 24 25 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 Q13 Q14 Q15 Q16 GND SUSTAIN NC LATCH ENABLE NC VCC DATA IN2 DATA IN1 SN751518 . . . FT PACKAGE (TOP VIEW) Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 Q13 Q14 Q15 Q16 GND SUSTAIN NC LATCH ENABLE NC VCC DATA IN2 DATA IN1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 Q32 47 Q31 46 Q30 45 Q29 44 Q28 43 Q27 42 Q26 41 Q25 40 Q24 39 Q23 38 Q22 37 Q21 36 Q20 35 Q19 34 Q18 33 Q17 32 GND 31 NC 30...