Download SN75LVDS388A Datasheet PDF
SN75LVDS388A page 2
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SN75LVDS388A Key Features

  • 1 Four- ('390), Eight- ('388A), or Sixteen- ('386) Line Receivers Meet or Exceed the Requirements of ANSI TIA/EIA-644 St
  • Integrated 110-Ω Line Termination Resistors on LVDT Products
  • Designed for Signaling Rates Up to 250 Mbps
  • SN65 Versions Bus-Terminal ESD Exceeds
  • Operates From a Single 3.3-V Supply
  • Typical Propagation Delay Time of 2.6 ns
  • Output Skew 100 ps (Typical) Part-To-Part Skew
  • LVTTL Levels Are 5-V Tolerant
  • Open-Circuit Fail Safe
  • Flow-Through Pinout