Datasheet Details
| Part number | SNJ54HC112W |
|---|---|
| Manufacturer | Texas Instruments |
| File Size | 1.01 MB |
| Description | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS |
| Datasheet | SNJ54HC112W SNJ54HC112J Datasheet (PDF) |
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Overview: SN54HC112, SN74HC112 DUAL JĆK NEGATIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH CLEAR AND PRESET SCLS099F − DECEMBER 1982 − REVISED SEPTEMBER 2003 D Wide Operating Voltage Range of 2 V to 6 V D Outputs Can Drive Up To 10 LSTTL.
This datasheet includes multiple variants, all published together in a single manufacturer document.
| Part number | SNJ54HC112W |
|---|---|
| Manufacturer | Texas Instruments |
| File Size | 1.01 MB |
| Description | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS |
| Datasheet | SNJ54HC112W SNJ54HC112J Datasheet (PDF) |
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/ordering information The ’HC112 devices contain two independent J-K negative-edge-triggered flip-flops.
A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs.
When PRE and CLR are inactive (high), data at the J and K inputs meeting the setup time requirements are transferred to the outputs on the negative-going edge of the clock (CLK) pulse.
| Part Number | Description |
|---|---|
| SNJ54HC112FK | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS |
| SNJ54HC112J | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS |
| SNJ54HC109FK | DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS |
| SNJ54HC109J | DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS |
| SNJ54HC109W | DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS |
| SNJ54HC10FK | TRIPLE 3-INPUT POSITIVE-NAND GATES |
| SNJ54HC10J | TRIPLE 3-INPUT POSITIVE-NAND GATES |
| SNJ54HC10W | TRIPLE 3-INPUT POSITIVE-NAND GATES |
| SNJ54HC148FK | 8-LINE TO 3-LINE PRIORITY ENCODERS |
| SNJ54HC148J | 8-LINE TO 3-LINE PRIORITY ENCODERS |