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TMS320C242 - DSP Controller

General Description

The TMS320C242 device is a member of the TMS320 DSP family of digital signal processor (DSP) controllers based on the TMS320C2xx generation of 16-bit fixed-point DSPs.

This new generation is optimized for digital motor/motion control applications.

Key Features

  • . . . 3 FN Package, 68-Pin PLCC, C242.
  • . . . 5 PG Package, 64-Pin QFP, C242.
  • . . . . 6 Terminal Functions - C242 PG and FN Packages . . . . 7 Functional Block Diagram.
  • . . . 11 Architectural Overview.
  • . 12 System-Level Functions.
  • 12 Device Memory Map.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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D High-Performance Static CMOS Technology D Includes the TMS320C2xx Core CPU − Object-Compatible With the TMS320C2xx − Source-Code-Compatible With TMS320C25 − Upwardly Compatible With TMS320C5x DSP Generation − 50-ns Instruction Cycle Time D Pin-Compatible With TMS320F241 (64-Pin/68-Pin) D Code-Compatible With TMS320F243 and TMS320F241 D Commercial and Industrial Temperature Available D Memory − 544 Words x 16 Bits of On-Chip Data/Program Dual-Access RAM (DARAM) − 4K Words x 16 Bits of On-chip Program ROM D Event-Manager Module − Eight Compare/Pulse-Width Modulation (PWM) Channels − Two 16-Bit General-Purpose Timers With Four Modes, Including Continuous Up and Up / Down Counting − Three 16-Bit Full Compare Units With Deadband − Three Capture Units (Two With Quadrature Encoder-Pulse Interf