TMS320DM6467T
Overview
- High-Performance Digital Media SoC - 1-GHz C64x+™ Clock Rate - 500-MHz ARM926EJ-S™ Clock Rate - Eight 32-Bit C64x+ Instructions/Cycle - 8000 C64x+ MIPS - Fully Software-Compatible With C64x / ARM9™ - Industrial Temperature Devices Available
- Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x+™ DSP Core - Eight Highly Independent Functional Units
- Six ALUs (32-/40-Bit), Each Supports Single 32-Bit, Dual 16-Bit, or Quad 8-Bit Arithmetic per Clock Cycle - 128K-Byte L2 Unified Mapped RAM/Cache (Flexible RAM/Cache Allocation)
- ARM926EJ-S Core - Support for 32-Bit and 16-Bit (Thumb® Mode) Instruction Sets - DSP Instruction Extensions and Single Cycle MAC - ARM® Jazelle® Technology - EmbeddedICE-RT™ Logic for Real-Time Debug
- ARM9 Memory Architecture - 16K-Byte Instruction Cache - 8K-Byte Data Cache - 32K-Byte RAM
- Two Multipliers Support Four 16 x 16-Bit - 8K-Byte ROM Multiplies (32-Bit Results) per Clock
- Embedded Trace Buffer™ (ETB11™) With 4KB Cycle or Eight 8 x 8-Bit Multiplies (16-Bit Memory for ARM9 Debug Results) per Clock Cycle
- Endianness: Little Endian for ARM and DSP - Load-Store Architecture With Non-Aligned Support
- Dual Programmable High-Definition Video Image Co-Processor (HDVICP) Engines - 64 32-Bit General-Purpose Registers - Supports a Range of Encode, Decode, and - Instruction Packing Reduces Code Size Transcode Operations - All Instructions Conditional
- H.264, MPEG2, VC1, MPEG4 SP/ASP - Additional C64x+™ Enhancements
