TMS320DM647 Datasheet | Texas Instruments

Features - High-Performance Digital Media Processor - C64x+ L1/L2 Memory Architecture - 720-MHz, 800-MHz, 900-MHz, 1.1-GHz - 256K-bit (32K-byte) L1P Program RAM/Cache C64x+™ Clock Rates [Direct Mapped] - 1.39 ns (-720), 1.25 ns (-800), 1.11 ns (-900), - 256K-bit (32K-byte) L1D Data RAM/Cache 0.91 ns (-1100) Instruction Cycle Time [2-Way Set-Associative] - 5760, 6400, 7200, 8800 MIPS - 2M-bit/256K-byte (DM647) or 4M-Bit/512K- - Eight 32-Bit C64x+ Instructions/Cycle - Fully Software-patible With C64x/Debug byte) (DM648) L2 Unified Mapped RAM/Cache [Flexible Allocation] - mercial Temperature Ranges (-720, -900, and -1100 only) - Extended Temperature Ranges (-800 only) - Industrial Temperature Ranges (-720, -900, and -1100 only) - Veloci TI.2™ Extensions to Veloci TI™ Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x+™ DSP Core - Eight Highly Independent Functional Units With Veloci TI.2 Extensions: - Six ALUs (32-/40-Bit), Each Supports Single 32-bit, Dual 16-bit, or Quad 8-bit Arithmetic per Clock Cycle - Two Multipliers Support Four 16 x 16-bit Multiplies (32-bit Results) per Clock Cycle or Eight 8 x 8-bit Multiplies (16-Bit Results) per Clock Cycle - Supports Little Endian Mode Only - Five Configurable Video Ports - Providing a Glueless I/F to mon Video Decoder and Encoder Devices - Supports Multiple Resolutions/Video Standards - VCXO Interpolated Control Port (VIC) - Supports Audio/Video Synchronization - External Memory Interfaces (EMIFs) - 32-Bit DDR2 SDRAM Memory Controller With 512M-Byte Address Space (1.8-V I/O) - Asynchronous 16-Bit Wide EMIF (EMIFA) - Up to 128M-Byte Total Address Reach - 64M-Byte Address Reach per CE Space - Glueless Interface to Asynchronous Memories (SRAM, Flash, and EEPROM) - Load-Store Architecture With Non-Aligned Support - Synchronous Memories (SBSRAM and ZBT SRAM) - 64 32-bit General-Purpose Registers - Supports Interface to Standard Sync Devices - Instruction Packing Reduces Code...