TPIC5323L Description
DRAIN3 6 11 SOURCE3 The TPIC5323L is a monolithic gate-protected logic-level power DMOS array that consists of DRAIN3 7 GND 8 10 SOURCE3 9 GATE3 three electrically isolated independent N-channel enhancement-mode DMOS transistors. Each.
TPIC5323L Key Features
- 40°C to 125°C
- POST OFFICE BOX 655303 DALLAS, TEXAS 75265
- NOVEMBER 1994
- REVISED SEPTEMBER 1995