TPIC5621L Datasheet | Texas Instruments

description The TPIC5621L is a monolithic logic-level power DMOS-transistor array that consists of six N-channel enhancement-mode DMOS transistors, three of which are configured with a mon source. The TPIC5621L is offered in a wide-body surfacemount (DW) package and is characterized for operation over the case temperature range of - 40°C to 125°C. TPIC5621L SIXĆOUTPUT POWER DMOS ARRAY ą SLIS033 - JUNE 1994 DW PACKAGE (TOP VIEW) DRAIN4 GATE4 SOURCE4/GND SOURCE5/GND DRAIN5 GATE5 SOURCE5/GND SOURCE6/GND GATE6 DRAIN6 1 2 3 4 5 6 7 8 9 10 20 SOURCE1 19 NC 18 GATE1 17 DRAIN1 16 DRAIN2 15 SOURCE2 14 GATE2 13 DRAIN3 12 GATE3 11 SOURCE3 - No internal connection schematic 17 DRAIN1 Q1 GATE1 18 SOURCE2 GATE2 DRAIN2 15 14 16 Z1 D1 Q2 Z2 D2 D3 Z3 13 DRAIN3 Q3 12 GATE3 20 SOURCE1 1 DRAIN4 Q4 GATE4 2 Z4 Q5 Z5 11 SOURCE3 10 DRAIN6 Q6 9 GATE6 Z6 5 3, 4, 7, 8 DRAIN5 6 GND, SOURCE4, GATE5 SOURCE5, SOURCE6 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright  1994, Texas Instruments Incorporated - POST OFFICE BOX 655303 DALLAS, TEXAS 75265 - POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-...