Datasheet Details
| Part number | 74AHC138-Q100 |
|---|---|
| Manufacturer | Nexperia |
| File Size | 256.88 KB |
| Description | 3-to-8 line decoder/demultiplexer |
| Datasheet | 74AHC138-Q100-nexperia.pdf |
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Overview: 74AHC138-Q100; 74AHCT138-Q100 3-to-8 line decoder/demultiplexer; inverting Rev. 3 — 10 September 2020 Product data sheet 1.
| Part number | 74AHC138-Q100 |
|---|---|
| Manufacturer | Nexperia |
| File Size | 256.88 KB |
| Description | 3-to-8 line decoder/demultiplexer |
| Datasheet | 74AHC138-Q100-nexperia.pdf |
|
|
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The 74AHC138-Q100;
74AHCT138-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL).
They are specified in compliance with JEDEC standard No.
| Part Number | Description |
|---|---|
| 74AHC138 | 3-to-8 line decoder/demultiplexer |
| 74AHC138BQ | 3-to-8 line decoder/demultiplexer |
| 74AHC138D | 3-to-8 line decoder/demultiplexer |
| 74AHC132 | Quad 2-input NAND Schmitt trigger |
| 74AHC132-Q100 | Quad 2-input NAND Schmitt trigger |
| 74AHC132BQ | Quad 2-input NAND Schmitt trigger |
| 74AHC132D | Quad 2-input NAND Schmitt trigger |
| 74AHC139 | Dual 2-to-4 line decoder/demultiplexer |
| 74AHC139-Q100 | Dual 2-to-4 line decoder/demultiplexer |
| 74AHC139D | Dual 2-to-4 line decoder/demultiplexer |