Datasheet Summary
74AHC574; 74AHCT574
Octal D-type flip-flop; positive edge-trigger; 3-state
Rev. 02
- 24 January 2008
Product data sheet
1. General description
The 74AHC574; 74AHCT574 are high-speed Si-gate CMOS devices and are pin patible with Low Power Schottky TTL (LSTTL). They are specified in pliance with JEDEC standard no. 7A.
The 74AHC574; 74AHCT574 are octal D-type flip-flops featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. A clock (CP) and an output enable (OE) input are mon to all flip-flops.
The 8 flip-flops will store the state of their individual D-inputs that meet the set-up and hold times requirements on the LOW-to-HIGH CP transition.
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