74AHCT273D Description
74AHCT273 is a high-speed Si-gate CMOS device and is pin patible with Low-power Schottky TTL (LSTTL). It is specified in pliance with JEDEC standard No. 74AHCT273 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs.
74AHCT273D Key Features
- Balanced propagation delays
- All inputs have Schmitt-trigger actions
- Inputs accept voltages higher than VCC
- Ideal buffer for MOS microcontroller or memory
- mon clock and master reset
- Input levels
- For 74AHC273: CMOS level
- For 74AHCT273: TTL level
- ESD protection
- HBM JESD22-A114E exceeds 2000 V