74AHCT273 Description
74AHCT273 The 74AHC/AHCT273 are high-speed Si-gate CMOS devices and are pin patible with low power Schottky TTL (LSTTL). They are specified in pliance with JEDEC standard no. The 74AHC/AHCT273 have eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs.
74AHCT273 Key Features
- Ideal buffer for MOS microcontroller or memory
- mon clock and master reset
- Balanced propagation delays
- All inputs have Schmitt trigger actions
- Inputs accepts voltages higher than VCC
- See ‘377’ for clock enable version
- See ‘373’ for transparent latch version
- See ‘374’ for 3-state version
- For AHC only: operates with CMOS input levels
- For AHCT only: operates with TTL input levels