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74AHCT273PW Datasheet Octal D-type Flip-flop

Manufacturer: Nexperia

Overview: 74AHC273; 74AHCT273 Octal D-type flip-flop with reset; positive-edge trigger Rev. 4 — 23 September 2020 Product data sheet 1.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

The 74AHC273;

74AHCT273 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL).

It is specified in compliance with JEDEC standard No.

Key Features

  • Balanced propagation delays.
  • All inputs have Schmitt-trigger actions.
  • Inputs accept voltages higher than VCC.
  • Ideal buffer for MOS microcontroller or memory.
  • Common clock and master reset.
  • Input levels:.
  • For 74AHC273: CMOS level.
  • For 74AHCT273: TTL level.
  • ESD protection:.
  • HBM JESD22-A114E exceeds 2000 V.
  • MM JESD22-A115-A exceeds 200 V.
  • CDM JESD22-C101C exceeds 1000 V.
  • Multiple p.

Similar Datasheet

Brand Logo Part Number Description Manufacturer
NXP Logo 74AHCT273 Octal D-type flip-flop NXP

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74AHCT273PW Distributor