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74ALVC162835A - 18-bit registered driver

General Description

The 74ALVC162835A is an 18-bit universal bus driver.

Data flow is controlled by output enable (OE), latch enable (LE) and clock inputs (CP).

When LE is HIGH, the A to Y data flow is transparent.

Key Features

  • Wide supply voltage range from 1.2 V to 3.6 V.
  • CMOS low-power consumption.
  • Direct interface with TTL levels.
  • Current drive ± 12 mA at 3.0 V.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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74ALVC162835A 18-bit registered driver with 30 Ω termination resistors; 3-state Rev. 7 — 12 October 2017 Product data sheet 1 General description The 74ALVC162835A is an 18-bit universal bus driver. Data flow is controlled by output enable (OE), latch enable (LE) and clock inputs (CP). When LE is HIGH, the A to Y data flow is transparent. When LE is LOW and CP is held at LOW or HIGH, the data is latched; on the LOW to HIGH transient of CP the A-data is stored in the latch/flip-flop. When OE is LOW the outputs are active. When OE is HIGH, the outputs go to the high impedance OFF-state. Operation of the OE input does not affect the state of the latch/ flip-flop.