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74ALVC32BQ - Quad 2-input OR gate

This page provides the datasheet information for the 74ALVC32BQ, a member of the 74ALVC32 Quad 2-input OR gate family.

Description

The 74ALVC32 is a quad 2-input OR gate.

Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times.

2.

Features

  • Wide supply voltage range from 1.65 V to 3.6 V.
  • 3.6 V tolerant inputs/outputs.
  • CMOS low power consumption.
  • Direct interface with TTL levels (2.7 V to 3.6 V).
  • Power-down mode.
  • Latch-up performance exceeds 250 mA.
  • Complies with JEDEC standards:.
  • JESD8-7 (1.65 V to 1.95 V).
  • JESD8-5 (2.3 V to 2.7 V).
  • JESD8B (2.7 V to 3.6 V).
  • ESD protection:.
  • HBM JESD22-A114E exceeds 2000 V.
  • MM JESD22.

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Datasheet preview – 74ALVC32BQ

Datasheet Details

Part number 74ALVC32BQ
Manufacturer nexperia
File Size 227.51 KB
Description Quad 2-input OR gate
Datasheet download datasheet 74ALVC32BQ Datasheet
Additional preview pages of the 74ALVC32BQ datasheet.

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Full PDF Text Transcription

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74ALVC32 Quad 2-input OR gate Rev. 5 — 30 April 2021 Product data sheet 1. General description The 74ALVC32 is a quad 2-input OR gate. Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times. 2. Features and benefits • Wide supply voltage range from 1.65 V to 3.6 V • 3.6 V tolerant inputs/outputs • CMOS low power consumption • Direct interface with TTL levels (2.7 V to 3.6 V) • Power-down mode • Latch-up performance exceeds 250 mA • Complies with JEDEC standards: • JESD8-7 (1.65 V to 1.95 V) • JESD8-5 (2.3 V to 2.7 V) • JESD8B (2.7 V to 3.6 V) • ESD protection: • HBM JESD22-A114E exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • Multiple package options • Specified from -40 °C to +85 °C 3. Ordering information Table 1.
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