74ALVCH16825DGG Description
The 74ALVCH16825 is an 18 bit non-inverting buffer/driver with 3-state outputs for bus-oriented applications. The 74ALVCH16825 consists of two 9-bit sections with separate output enable signals. For either 9-bit buffer section, the two output enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must both be LOW for corresponding nYn outputs to be active.
74ALVCH16825DGG Key Features
- Wide supply voltage range of 1.2V to 3.6V
- CMOS low power consumption
- MultiByte flow-through standard pin-out architecture
- Low inductance multiple VCC and GND pins for minimum noise and ground bounce
- Direct interface with TTL levels (2.7 V to 3.6 V)
- Bus hold on data inputs
- Output drive capability 50 Ω transmission lines at 85 °C
- Current drive ±24 mA at 3.0 V
- plies with JEDEC standards
- JESD8-5 (2.3 V to 2.7 V)
74ALVCH16825DGG Applications
- Wide supply voltage range of 1.2V to 3.6V