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74ALVCH16821 - 20-bit bus-interface D-type flip-flop

Datasheet Summary

Description

The 74ALVCH16821 has two 10-bit, edge triggered registers, with each register coupled to a 3-State output buffer.

The two sections of each register are controlled independently by the clock (nCP) and Output Enable (nOE) control gates.

Each register is fully edge triggered.

Features

  • Wide supply voltage range of 1.2V to 3.6V.
  • Complies with JEDEC standard no. 8-1A.
  • Current drive ± 24 mA at 3.0 V.
  • CMOS low power consumption.
  • Direct interface with TTL levels.

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Datasheet Details

Part number 74ALVCH16821
Manufacturer NXP
File Size 95.32 KB
Description 20-bit bus-interface D-type flip-flop
Datasheet download datasheet 74ALVCH16821 Datasheet
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INTEGRATED CIRCUITS 74ALVCH16821 20-bit bus-interface D-type flip-flop; positive-edge trigger (3-State) Product specification IC24 Data Handbook 1998 May 29 Philips Semiconductors Philips Semiconductors Product specification 20-bit bus-interface D-type flip-flop; positive-edge trigger (3-State) 74ALVCH16821 FEATURES • Wide supply voltage range of 1.2V to 3.6V • Complies with JEDEC standard no. 8-1A • Current drive ± 24 mA at 3.0 V • CMOS low power consumption • Direct interface with TTL levels • MULTIBYTETM flow-through standard pin-out architecture • Low inductance multiple VCC and ground pins for minimum noise and ground bounce DESCRIPTION The 74ALVCH16821 has two 10-bit, edge triggered registers, with each register coupled to a 3-State output buffer.
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