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74AUP1G17 - Low-power Schmitt trigger

Description

The 74AUP1G17 is a single buffer with Schmitt-trigger input.

This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial power down applications using IOFF.

Features

  • Wide supply voltage range from 0.8 V to 3.6 V.
  • CMOS low power dissipation.
  • High noise immunity.
  • Overvoltage tolerant inputs to 3.6 V.
  • Low noise overshoot and undershoot < 10 % of VCC.
  • IOFF circuitry provides partial Power-down mode operation.
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
  • Low static power consumption; ICC = 0.9 μA (maximum).
  • Complies with JEDEC standards:.
  • JESD8-12 (0.8.

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Datasheet preview – 74AUP1G17

Datasheet Details

Part number 74AUP1G17
Manufacturer nexperia
File Size 316.46 KB
Description Low-power Schmitt trigger
Datasheet download datasheet 74AUP1G17 Datasheet
Additional preview pages of the 74AUP1G17 datasheet.

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Full PDF Text Transcription

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74AUP1G17 Low-power Schmitt trigger Rev. 13 — 13 January 2022 Product data sheet 1. General description The 74AUP1G17 is a single buffer with Schmitt-trigger input. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Wide supply voltage range from 0.8 V to 3.6 V • CMOS low power dissipation • High noise immunity • Overvoltage tolerant inputs to 3.
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