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74AUP1T32 - Low-power 2-input OR-gate

Description

The 74AUP1T32 provides the single 2-input OR function.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 2.3 V to 3.6 V.

Features

  • Wide supply voltage range from 2.3 V to 3.6 V.
  • High noise immunity.
  • ESD protection:.
  • HBM JESD22-A114F Class 3A exceeds 5000 V.
  • CDM JESD22-C101E exceeds 1000 V.
  • Low static power consumption; ICC = 1.5 μA (maximum).
  • Latch-up performance exceeds 100 mA per JESD 78 Class II.
  • Inputs accept voltages up to 3.6 V.
  • Low noise overshoot and undershoot < 10 % of VCC.
  • IOFF circuitry provides partial power-down mode ope.

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Datasheet preview – 74AUP1T32

Datasheet Details

Part number 74AUP1T32
Manufacturer nexperia
File Size 231.02 KB
Description Low-power 2-input OR-gate
Datasheet download datasheet 74AUP1T32 Datasheet
Additional preview pages of the 74AUP1T32 datasheet.

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Full PDF Text Transcription

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74AUP1T32 Low-power 2-input OR-gate with voltage-level translator Rev. 3 — 25 January 2022 Product data sheet 1. General description The 74AUP1T32 provides the single 2-input OR function. This device ensures a very low static and dynamic power consumption across the entire VCC range from 2.3 V to 3.6 V. The 74AUP1T32 is designed for logic-level translation applications with input switching levels that accept 1.8 V low-voltage CMOS signals, while operating from either a single 2.5 V or 3.3 V supply voltage. The wide supply voltage range ensures normal operation as battery voltage drops from 3.6 V to 2.3 V. This device is fully specified for partial power-down applications using IOFF.
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