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74HC157PW - Quad 2-input multiplexer

Download the 74HC157PW datasheet PDF. This datasheet also covers the 74HC157 variant, as both devices belong to the same quad 2-input multiplexer family and are provided as variant models within a single manufacturer datasheet.

General Description

The 74HC157; 74HCT157 is a quad 2-input multiplexer.

Key Features

  • Wide supply voltage range from 2.0 V to 6.0 V.
  • CMOS low power dissipation.
  • High noise immunity.
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
  • Complies with JEDEC standards:.
  • JESD8C (2.7 V to 3.6 V).
  • JESD7A (2.0 V to 6.0 V).
  • Input levels:.
  • For 74HC157: CMOS level.
  • For 74HCT157: TTL level.
  • Non-inverting data path.
  • ESD protection:.
  • HBM: ANSI/ESDA/JEDEC.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74HC157-nexperia.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number 74HC157PW
Manufacturer Nexperia
File Size 269.12 KB
Description Quad 2-input multiplexer
Datasheet download datasheet 74HC157PW Datasheet

📁 Similar Datasheet

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74HC157 Quad 2-input multiplexer NXP
74HC157 QUAD 2 CHANNEL MULTIPLEXER STMicroelectronics
74HC157 Quad 2-Input Multiplexers Texas Instruments
74HC157A Quad 2-Input Data Selectors/Multiplexers Motorola
74HC157D Quad 2-Channel Multiplexer Toshiba

Other Datasheets by Nexperia

Part Number Description
74HC157 Quad 2-input multiplexer
74HC157-Q100 Quad 2-input multiplexer
74HC157BQ Quad 2-input multiplexer
74HC157D Quad 2-input multiplexer
74HC151 8-input multiplexer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74HC157; 74HCT157 Quad 2-input multiplexer Rev. 10 — 28 May 2024 Product data sheet 1. General description The 74HC157; 74HCT157 is a quad 2-input multiplexer. The device features select (S) and enable E inputs. A HIGH on S selects data source 1, a LOW data source 0. A HIGH on E forces all the outputs (1Y to 4Y) LOW. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.0 V • CMOS low power dissipation • High noise immunity • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B • Complies with JEDEC standards: • JESD8C (2.7 V to 3.6 V) • JESD7A (2.0 V to 6.