74HC158D Datasheet | Nexperia

74HC158 Quad 2-input multiplexer; inverting Rev. 4 - 23 December 2015 Product data sheet 1. General description The 74HC158 is a high-speed Si-gate CMOS device and is pin patible with low power Schottky TTL (LSTTL). The 74HC158 is specified in pliance with JEDEC standard no. 7A. The 74HC158 is a quad 2-input multiplexer which select 4 bits of data from two sources and are controlled by a mon data select input (S). The four outputs present the selected data in the inverted form. The enable input (E) is active LOW. When E is HIGH, all the outputs (1Y to 4Y) are forced HIGH regardless of all other input conditions. Moving the data from two groups of registers to four mon output...