74HC259 - 8-bit addressable latch

Nexperia

General Description

The 74HC259; 74HCT259 is an 8-bit addressable latch.

Key Features

Wide supply voltage range from 2.0 V to 6.0 V.
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
Complies with JEDEC standards:.
JESD8C (2.7 V to 3.6 V).
JESD7A (2.0 V to 6.0 V).
Combined demultiplexer and 8-bit latch.
Serial-to-parallel capability.
Output from each storage bit available.
Random (addressable) data entry.
Easily expandable.
Common reset input.
Useful as a 3.

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74HC259 8-bit addressable latch by Nexperia - Datasheet Preview

Datasheet Details

Part number	74HC259
Manufacturer	Nexperia
File Size	312.13 KB
Description	8-bit addressable latch
Datasheet	74HC259 Datasheet

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Other Datasheets by Nexperia

Part Number	Description
74HC259-Q100	8-bit addressable latch
74HC259D	8-bit addressable latch
74HC251	8-input multiplexer
74HC251-Q100	8-input multiplexer
74HC251D	8-input multiplexer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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74HC259; 74HCT259 8-bit addressable latch Rev. 8 — 5 December 2022 Product data sheet 1. General description The 74HC259; 74HCT259 is an 8-bit addressable latch. The device features four modes of operation. In the addressable latch mode, data on the D input is written into the latch addressed by the inputs A0 to A3. The addressed latch will follow the data input, non-addressed latches will retain their previous states. In memory mode, all latches retain their previous states and are unaffected by the data or address inputs. In the 3-to-8 decoding or demultiplexing mode, the addressed output follows the D input and all other outputs are LOW. In the reset mode, all outputs are forced LOW and unaffected by the data or address inputs. Inputs include clamp diodes.