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74HC373D - Octal D-type transparent latch

This page provides the datasheet information for the 74HC373D, a member of the 74HC373 Octal D-type transparent latch family.

Datasheet Summary

Description

The 74HC373; 74HCT373 is an octal D-type transparent latch with 3-state outputs.

Features

  • Wide supply voltage range from 2.0 V to 6.0 V.
  • CMOS low power dissipation.
  • High noise immunity.
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
  • Complies with JEDEC standards:.
  • JESD8C (2.7 V to 3.6 V).
  • JESD7A (2.0 V to 6.0 V).
  • Input levels:.
  • For 74HC373: CMOS level.
  • For 74HCT373: TTL level.
  • 3-state non-inverting outputs for bus oriented.

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Datasheet preview – 74HC373D

Datasheet Details

Part number 74HC373D
Manufacturer nexperia
File Size 277.27 KB
Description Octal D-type transparent latch
Datasheet download datasheet 74HC373D Datasheet
Additional preview pages of the 74HC373D datasheet.

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Full PDF Text Transcription

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74HC373; 74HCT373 Octal D-type transparent latch; 3-state Rev. 8 — 6 September 2021 Product data sheet 1. General description The 74HC373; 74HCT373 is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Inputs include clamp diodes.
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