Nexperia 74HCT107-Q100
74HCT107-Q100 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock input. The J and K inputs control the state changes of the flip-flops as described in the mode select function table.| Part No. | 74HCT107-Q100 |
|---|---|
| Datasheet | 74HCT107-Q100 Download |
| Manufacturer |  Nexperia |
| Description | Dual JK flip-flop |
| Buy | Stock & Price |
FEATURES AND BENEFITS
● Automotive product qualification in accordance with AEC-Q100 (Grade 1)● Specified from -40 °C to +85 °C and from -40 °C to +125 °C
● Wide supply voltage range from 2.0 V to 6.0 V
● CMOS low power dissipation
● High noise immunity
● Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
● Complies with JEDEC standards:
● JESD8C (2.7 V to 3.6 V)
● JESD7A (2.0 V to 6.0 V)
● Input levels:
● For 74HC107-Q100: CMOS level
● For 74HCT107-Q100: TTL level
● ESD protection:
● MIL-STD-883, method 3015 exceeds 2000 V
● HBM JESD22-A114F exceeds 2000 V
● MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω) 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name
DESCRIPTION
Version 74HC107D-Q100 74HCT107D-Q100 -40 °C to +125 °C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 74HC107PW-Q100 -40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads; SOT402-1 body width 4.4 mm Nexperia 4.
