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74HCT138 Datasheet 3-to-8 Line Decoder/demultiplexer

Manufacturer: Nexperia

Overview: 74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Rev. 9 — 13 August 2021 Product data sheet 1.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

The 74HC138;

74HCT138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7).

The device

Key Features

  • Wide supply voltage range from 2.0 to 6.0 V.
  • CMOS low power dissipation.
  • High noise immunity.
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
  • Demultiplexing capability.
  • Multiple input enable for easy expansion.
  • Ideal for memory chip select decoding.
  • Active LOW mutually exclusive outputs.
  • Input levels:.
  • For 74HC138: CMOS level.
  • For 74HCT138: TTL level.
  • Complies with JEDEC.

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