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74LV00A - Quad 2-input NAND gate

General Description

The 74LV00A is a quad 2-input NAND gate.

Inputs are overvoltage tolerant.

This feature allows the use of these devices as translators in mixed voltage environments.

Key Features

  • Wide supply voltage range from 2.0 V to 5.5 V.
  • Maximum tpd of 9 ns at 5 V.
  • Typical VOL(p) < 0.8 V at VCC = 3.3 V, Tamb = 25 °C.
  • Typical VOH(v) > 2.3 V at VCC = 3.3 V, Tamb = 25 °C.
  • Supports mixed-mode voltage operation on all ports.
  • IOFF circuitry provides partial Power-down mode operation.
  • Latch-up performance exceeds 250 mA per JESD 78 Class II.
  • ESD protection:.
  • MM: MM JESD22-A115-B exceeds 200 V.
  • HBM: A.

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Datasheet Details

Part number 74LV00A
Manufacturer Nexperia
File Size 182.08 KB
Description Quad 2-input NAND gate
Datasheet download datasheet 74LV00A Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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74LV00A Quad 2-input NAND gate Rev. 1 — 19 December 2018 Product data sheet 1. General description The 74LV00A is a quad 2-input NAND gate. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Wide supply voltage range from 2.0 V to 5.5 V • Maximum tpd of 9 ns at 5 V • Typical VOL(p) < 0.8 V at VCC = 3.3 V, Tamb = 25 °C • Typical VOH(v) > 2.3 V at VCC = 3.