Description
The 74LVC138A decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7).
Features
- Overvoltage tolerant inputs to 5.5 V.
- Wide supply voltage range from 1.2 V to 3.6 V.
- CMOS low power consumption.
- Direct interface with TTL levels.
- Demultiplexing capability.
- Multiple input enable for easy expansion.
- Ideal for memory chip select decoding.
- Mutually exclusive outputs.
- Output drive capability 50 Ω transmission lines at 125 °C.
- Complies with JEDEC standard:.
- JESD8-7A (1.65 V to 1.95 V).
74LVC138A Datasheet
