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74LVC138A - 3-to-8 line decoder/demultiplexer

General Description

The 74LVC138A is a low-voltage, low-power, high-performance Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

The 74LVC138A accepts three binary weighted address inputs (A0, A1, A2) and when enabled, provides 8 mutually exclusive active LOW outputs (Y0 to Y7).

Key Features

  • Wide supply voltage range of 1.2 to 3.6 V.
  • In accordance with JEDEC standard no. 8-1A.
  • Inputs accept voltages up to 5.5 V.
  • CMOS lower power consumption.
  • Direct interface with TTL levels.
  • Demultiplexing capability.
  • Multiple input enable for easy expansion.
  • Ideal for memory chip select decoding.
  • Active LOW mutually exclusive outputs.
  • Output drive capability 50 W transmission lines at 85°C.

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Other Datasheets by Philips Semiconductors (now NXP Semiconductors)

Part Number Description
74LVC139 Dual 2-to-4 line decoder/demultiplexer
74LVC10 Triple 3-input NAND gate
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74LVC10D Triple 3-input NAND gate

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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INTEGRATED CIRCUITS 74LVC138A 3-to-8 line decoder/demultiplexer; inverting Product specification 1998 Apr 28 Philips Semiconductors Philips Semiconductors Product specification 3-to-8 line decoder/demultiplexer; inverting 74LVC138A FEATURES • Wide supply voltage range of 1.2 to 3.6 V • In accordance with JEDEC standard no. 8-1A • Inputs accept voltages up to 5.5 V • CMOS lower power consumption • Direct interface with TTL levels • Demultiplexing capability • Multiple input enable for easy expansion • Ideal for memory chip select decoding • Active LOW mutually exclusive outputs • Output drive capability 50 W transmission lines at 85°C DESCRIPTION The 74LVC138A is a low-voltage, low-power, high-performance Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.