74LVC138A Description
The 74LVC138A is a low-voltage, low-power, high-performance Si-gate CMOS device, superior to most advanced CMOS patible TTL families. The 74LVC138A accepts three binary weighted address inputs (A0, A1, A2) and when enabled, provides 8 mutually exclusive active LOW outputs (Y0 to Y7).
74LVC138A Key Features
- Wide supply voltage range of 1.2 to 3.6 V
- In accordance with JEDEC standard no. 8-1A
- Inputs accept voltages up to 5.5 V
- CMOS lower power consumption
- Direct interface with TTL levels
- Demultiplexing capability
- Multiple input enable for easy expansion
- Ideal for memory chip select decoding
- Active LOW mutually exclusive outputs
- Output drive capability 50 W transmission lines at 85°C