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74LVC373A - Octal D-type transparent latch

Datasheet Summary

Description

The 74LVC373A is an octal D-type transparent latch with 3-state outputs.

Features

  • Overvoltage tolerant inputs to 5.5 V.
  • Wide supply voltage range from 1.2 V to 3.6 V.
  • CMOS low power consumption.
  • Direct interface with TTL levels.
  • High-impedance outputs when VCC = 0 V.
  • IOFF circuitry provides partial Power-down mode operation.
  • Complies with JEDEC standard:.
  • JESD8-7A (1.65 V to 1.95 V).
  • JESD8-5A (2.3 V to 2.7 V).
  • JESD8-C/JESD36 (2.7 V to 3.6 V).
  • ESD protection:.
  • HBM JESD2.

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Datasheet Details

Part number 74LVC373A
Manufacturer nexperia
File Size 269.63 KB
Description Octal D-type transparent latch
Datasheet download datasheet 74LVC373A Datasheet
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Full PDF Text Transcription

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74LVC373A Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state Rev. 5 — 27 August 2021 Product data sheet 1. General description The 74LVC373A is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Inputs can be driven from either 3.3 V or 5 V devices.
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