Nexperia 74LVC74A
The 74LVC74A is a dual edge triggered D-type flip-flop with individual data (nD) inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. The nD inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition, for predictable operation.| Part No. | 74LVC74A |
|---|---|
| Datasheet | 74LVC74A Download |
| Manufacturer |  Nexperia |
| Description | Dual D-type flip-flop |
| Buy | Stock & Price |
FEATURES AND BENEFITS
● 5 V tolerant inputs for interlacing with 5 V logic● Wide supply voltage range from 1.2 V to 3.6 V
● CMOS low power consumption
● Direct interface with TTL levels
● Complies with JEDEC standard:
● JESD8-7A (1.65 V to 1.95 V)
● JESD8-5A (2.3 V to 2.7 V)
● JESD8-C/JESD36 (2.7 V to 3.6 V)
● ESD protection:
● HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
● CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
● Multiple package options
● Specified from -40 °C to +85 °C and -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name
DESCRIPTION
Version 74LVC74AD -40 °C to +125 °C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 74LVC74APW -40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads; SOT402-1 body width 4.4 mm 74LVC74ABQ -40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced SOT762-1 very thin quad flat package; no leads; 14 terminal...
