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74VHCT08 - Quad 2-input AND gate

This page provides the datasheet information for the 74VHCT08, a member of the 74VHC08 Quad 2-input AND gate family.

Datasheet Summary

Description

The 74VHC08; 74VHCT08 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard JESD7-A.

The 74VHC08; 74VHCT08 provide the quad 2-input AND function.

Features

  • Balanced propagation delays.
  • All inputs have a Schmitt-trigger action.
  • Inputs accepts voltages higher than VCC.
  • Input levels:.
  • The 74VHC08 operates with CMOS logic levels.
  • The 74VHCT08 operates with TTL logic levels.
  • ESD protection:.
  • HBM JESD22-A114E exceeds 2000 V.
  • MM JESD22-A115-A exceeds 200 V.
  • CDM JESD22-C101C exceeds 1000 V.
  • Multiple package options.
  • Specified from -40 °C to +85 °C a.

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Datasheet preview – 74VHCT08

Datasheet Details

Part number 74VHCT08
Manufacturer nexperia
File Size 226.00 KB
Description Quad 2-input AND gate
Datasheet download datasheet 74VHCT08 Datasheet
Additional preview pages of the 74VHCT08 datasheet.

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Full PDF Text Transcription

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74VHC08; 74VHCT08 Quad 2-input AND gate Rev. 2 — 8 April 2020 Product data sheet 1. General description The 74VHC08; 74VHCT08 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard JESD7-A. The 74VHC08; 74VHCT08 provide the quad 2-input AND function. 2.
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