74VHCT02 Description
74VHCT02 are high-speed Si-gate CMOS devices and are pin patible with Low-power Schottky TTL (LSTTL). They are specified in pliance with JEDEC standard No. 74VHCT02 provide a quad 2-input NOR function.
74VHCT02 Key Features
- Balanced propagation delays
- All inputs have a Schmitt-trigger action
- Inputs accept voltages higher than VCC
- Input levels
- The 74VHC02 operates with CMOS input level
- The 74VHCT02 operates with TTL input level
- ESD protection
- HBM JESD22-A114E exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V
- CDM JESD22-C101C exceeds 1000 V