onsemi 74LS174
The LS174 consists of six edge-triggered D flip-flops with individual D inputs and Q outputs. The Clock (CP) and Master Reset (MR) are common to all flip-flops.| Part No. | 74LS174 |
|---|---|
| Datasheet | 74LS174 Download |
| Manufacturer |  onsemi |
| Description | LOW POWER SCHOTTKY |
| Buy | Stock & Price |
DESCRIPTION
Each D input’s state is transferred to the corresponding flip-flop’s output following the LOW to HIGH Clock (CP) transition. A LOW input to the Master Reset (MR) will force all outputs LOW independent of Clock or Data inputs. The LS174 is useful for applications where the true output only is required and the Clock and Master Reset are common to all storage elements. TRUTH TABLE Inputs (t = n, MR = H) D H L Note 1: t = n + 1 indicates conditions after next clock. Outputs (t = n+1) Note 1 Q H L DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol VIH VIL VIK VOH Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage 2.7 – 0.65 3.5 0.25 VOL O Output LOW Voltage 0.35 IIH IIL IOS ICC Input HIGH Current 0.1 Input LOW Current Short Circuit Current (Note 1) Power Supply Current – 20 – 0.4 – 100 26 0.5 20 V µA mA mA mA mA IOL = 8.0 mA 0.4 Min 2.0 0.8 – 1.5 Typ Max Unit V V V V V Test Conditions Guarantee...
