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NCP51752 - 4.5-A/9-A Isolated Single Channel Gate Driver

General Description

Pin No.

3 GND1 4 VCC 5 OUT 6 GND2 7 VEE 8 I/O Power Input Input Power Power Output Power Power Description Input

side Supply Voltage.

It is recommended to place a bypass capacitor from VDD to GND1.

inverting Logic Input with in

Key Features

  • Feature Options.
  • VCC UVLO Referenced to GND2.
  • Built.
  • in Negative Bias between GND2 and VEE Pins Selectable Negative Bias Levels via Trim.
  • 3.
  • V to 20.
  • V Input Supply Voltage.
  • Output Supply Voltage from 6.5 V to 30 V with 6.
  • V and 8.
  • V for MOSFET, 12.
  • V and 17.
  • V for SiC, Threshold.
  • 4.5.
  • A Peak Source, 9.
  • A Peak Sink Output Current Capability.
  • Minimum CMTI of 200 V/ns dV/d.

📥 Download Datasheet

Datasheet Details

Part number NCP51752
Manufacturer onsemi
File Size 2.12 MB
Description 4.5-A/9-A Isolated Single Channel Gate Driver
Datasheet download datasheet NCP51752 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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3.75 kVRMS, 4.5-A/9-A Isolated Single Channel Gate Driver with Integrated Negative Bias Control NCP51752 The NCP51752 is a family of isolated single−channel gate driver with 4.5−A/9−A source and sink peak current respectively. They are designed for fast switching to drive power MOSFETs and SiC MOSFET power switches. The NCP51752 offers short and matched propagation delays. For improved reliability, dV/dt immunity and even faster turn−off, the NCP51752 has an innovative embedded negative bias rail mechanism. The NCP51752 offers other important protection function such as independent under−voltage lockout for both−side driver. Its Vcc UVLO threshold is referenced to GND2 for true UVLO regardless of VEE level.