74AUP1G0832 Datasheet and Specifications PDF

The 74AUP1G0832 is a Low-power 3-input AND-OR gate.

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Part Number74AUP1G0832 Datasheet
ManufacturerNexperia
Overview The 74AUP1G0832 is a single 3-input AND-OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic po. and benefits
* Wide supply voltage range from 0.8 V to 3.6 V
* CMOS low power dissipation
* High noise immunity
* Overvoltage tolerant inputs to 3.6 V
* Low noise overshoot and undershoot < 10 % of VCC
* IOFF circuitry provides partial Power-down mode operation
* Latch-up performance exceeds 100 mA .
Part Number74AUP1G0832 Datasheet
DescriptionLow Power 3-Input AND-OR Gate
ManufacturerNXP Semiconductors
Overview The 74AUP1G0832 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt trigger action at all inputs makes the circuit toler. s Wide supply voltage range from 0.8 V to 3.6 V s High noise immunity s Complies with JEDEC standards: x JESD8-12 (0.8 V to 1.3 V) x JESD8-11 (0.9 V to 1.65 V) x JESD8-7 (1.2 V to 1.95 V) x JESD8-5 (1.8 V to 2.7 V) x JESD8-B (2.7 V to 3.6 V) s ESD protection: x HBM JESD22-A114-D Class 3A exceeds 500.