74AUP1G240 Datasheet and Specifications PDF

The 74AUP1G240 is a Low-power inverting buffer/line driver.

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Part Number74AUP1G240 Datasheet
ManufacturerNexperia
Overview The 74AUP1G240 is a 1-bit inverting buffer/line driver with 3-state outputs. The device features an output enable (OE). A HIGH on OE causes the output to assume a high-impedance OFF-state. Schmitt-tri. an output enable (OE). A HIGH on OE causes the output to assume a high-impedance OFF-state. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to.
Part Number74AUP1G240 Datasheet
DescriptionLow-power inverting buffer/line driver
ManufacturerNXP Semiconductors
Overview The 74AUP1G240 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolera. s Wide supply voltage range from 0.8 V to 3.6 V s High noise immunity s Complies with JEDEC standards: x JESD8-12 (0.8 V to 1.3 V) x JESD8-11 (0.9 V to 1.65 V) x JESD8-7 (1.2 V to 1.95 V) x JESD8-5 (1.8 V to 2.7 V) x JESD8-B (2.7 V to 3.6 V) s ESD protection: x HBM JESD22-A114-D exceeds 5000 V x MM .