| Part Number | 74AUP2G08 Datasheet |
|---|---|
| Manufacturer | Diodes Incorporated |
| Overview |
Pin Assignments
The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.
The 74AUP2G08 is a dual two input AND gate. Both ga.
* Advanced Ultra Low Power (AUP) CMOS * Supply Voltage Range from 0.8V to 3.6V * ±4mA Output Drive at 3.0V * Low Static Power Consumption ICC < 0.9µA * Low Dynamic Power Consumption CPD = 6 pF (Typical at 3.6V) * Schmitt Trigger Action at all inputs makes the circuit tolerant for slower input rise a. |
74AUP2G08 Datasheet and Specifications PDF
The 74AUP2G08 is a DUAL AND GATE.
| Part Number | 74AUP2G08 Datasheet |
|---|---|
| Description | Low-power dual 2-input AND gate |
| Manufacturer | Nexperia |
| Overview |
The 74AUP2G08 is a dual 2-input AND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power con.
and benefits
* Wide supply voltage range from 0.8 V to 3.6 V * High noise immunity * CMOS low power dissipation * Low static power consumption; ICC = 0.9 μA (maximum) * Latch-up performance exceeds 100 mA per JESD78 Class II * Overvoltage tolerant inputs to 3.6 V * Low noise overshoot and undershoot. |
| Part Number | 74AUP2G08 Datasheet |
|---|---|
| Description | Low Power Dual 2-Input AND Gate |
| Manufacturer | NXP Semiconductors |
| Overview |
The 74AUP2G08 provides the dual 2-input AND function.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 .
and benefits
* Wide supply voltage range from 0.8 V to 3.6 V * High noise immunity * Complies with JEDEC standards: * JESD8-12 (0.8 V to 1.3 V) * JESD8-11 (0.9 V to 1.65 V) * JESD8-7 (1.2 V to 1.95 V) * JESD8-5 (1.8 V to 2.7 V) * JESD8-B (2.7 V to 3.6 V) * ESD protection: * HBM JESD22-A114F Class 3A. |