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74AUP2G08 - Low-power dual 2-input AND gate

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nexperia

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74AUP2G08 Low-power dual 2-input AND gate by nexperia - Datasheet Preview — Datasheet preview – 74AUP2G08

Datasheet Details

Part number	74AUP2G08
Manufacturer	nexperia
File Size	287.46 KB
Description	Low-power dual 2-input AND gate
Datasheet	74AUP2G08 Datasheet
Additional preview pages of the 74AUP2G08 datasheet.

Product details

Description

The 74AUP2G08 is a dual 2-input AND gate.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

Features

Wide supply voltage range from 0.8 V to 3.6 V.
High noise immunity.
CMOS low power dissipation.
Low static power consumption; ICC = 0.9 μA (maximum).
Latch-up performance exceeds 100 mA per JESD78 Class II.
Overvoltage tolerant inputs to 3.6 V.
Low noise overshoot and undershoot < 10 % of VCC.
IOFF circuitry provides partial Power-down mode operation.
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.

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Published: Jul 23, 2019 |