The 74F74 is a Dual D-Type Positive Edge-Triggered Flip-Flop.
| Package | DIP |
|---|---|
| Mount Type | Through Hole |
| Pins | 14 |
| Operating Voltage | 5 V |
| Max Voltage (typical range) | 5.5 V |
| Min Voltage (typical range) | 4.5 V |
| Logic Function | AND, D-Type, Flip-Flop |
| Clock Edge Trigger | Positive Edge |
| Part Number | 74F74 Datasheet |
|---|---|
| Manufacturer | Fairchild Semiconductor |
| Overview | The F74 is a dual D-type flip-flop with Direct Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Cl. Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the orderin. |
| Part Number | 74F74 Datasheet |
|---|---|
| Description | DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS |
| Manufacturer | Texas Instruments |
| Overview | These devices contain two independent positiveedge-triggered D-type flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs regardless of the levels of the other i. racterized for operation from 0°C to 70°C. SN54F74 . . . J PACKAGE SN74F74 . . . D OR N PACKAGE (TOP VIEW) 1CLR 1 1D 2 1CLK 3 1PRE 4 1Q 5 1Q 6 GND 7 14 VCC 13 2CLR 12 2D 11 2CLK 10 2PRE 9 2Q 8 2Q SN54F74 . . . FK PACKAGE (TOP VIEW) 1D 1CLR NC VCC 2CLR 1CLK NC 1PRE NC 1Q 3 2 1 20 19 4 18 5 . |
| Part Number | 74F74 Datasheet |
|---|---|
| Description | Dual D-type flip-flop |
| Manufacturer | Philips Semiconductors |
| Overview |
The 74F74 is a dual positive edge-triggered D-type flip-flop featuring individual data, clock, set, and reset inputs; also true and complementary outputs. Set (SD) and reset (RD) are asynchronous acti.
* Industrial temperature range available ( *40°C to +85°C) DESCRIPTION The 74F74 is a dual positive edge-triggered D-type flip-flop featuring individual data, clock, set, and reset inputs; also true and complementary outputs. Set (SD) and reset (RD) are asynchronous active low inputs and operate ind. |
| Part Number | 74F74 Datasheet |
|---|---|
| Description | Dual D-Type Positive Edge-Triggered Flip-Flop |
| Manufacturer | National Semiconductor |
| Overview | The ’F74 is a dual D-type flip-flop with Direct Clear and Set inputs and complementary (Q Q) outputs Information at the input is transferred to the outputs on the positive edge of the clock pulse Cloc. Y Guaranteed 4000V minimum ESD protection Commercial 74F74PC Military Package Number N14A Package Description 14-Lead (0 300 Wide) Molded Dual-In-Line 14-Lead Ceramic Dual-In-Line 14-Lead (0 150 Wide) Molded Small Outline JEDEC 14-Lead (0 300 Wide) Molded Small Outline EIAJ 14-Lead Cerpack 20-L. |
| Seller | Inventory | Price Breaks | Buy |
|---|---|---|---|
| Verical | 2700 | 701+ : 0.535 USD 1000+ : 0.4934 USD 10000+ : 0.4399 USD 100000+ : 0.3685 USD |
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| Verical | 3500 | 701+ : 0.535 USD 1000+ : 0.4934 USD 10000+ : 0.4399 USD 100000+ : 0.3685 USD |
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| Verical | 1072 | 701+ : 0.535 USD 1000+ : 0.4934 USD 10000+ : 0.4399 USD 100000+ : 0.3685 USD |
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