74LS139 Datasheet and Specifications PDF

The 74LS139 is a Decoder/Demultiplexer.

74LS139 Datasheet

74LS139 Datasheet (Fairchild Semiconductor)

Fairchild Semiconductor

74LS139 Datasheet Preview

These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory syste.

s Designed specifically for high speed: Memory decoders Data transmission systems s DM74LS138 3-to-8-line decoders incorporates 3 enable inputs to simplify cascading and/or data reception s DM74LS139 contains two fully independent 2-to-4-line decoders/demultiplexers s Schottky clamped for high perfo.

74LS139 Datasheet (onsemi)

onsemi

74LS139 Datasheet Preview

The LS139 is a high speed dual 1-of-4 decoder/ demultiplexer fabricated with the Schottky barrier diode process. The device has two independent decoders, each of which accept two binary weighted inpu.

t
* High Output Current
* Low Min 4.75 0 Typ 5.0 25 Max 5.25 70
* 0.4 8.0 Unit V °C mA mA 16 PLASTIC N SUFFIX CASE 648 1 SOIC D SUFFIX CASE 751B ORDERING INFORMATION Device SN74LS139N SN74LS139D Package 16 Pin DIP 16 Pin Shipping 2000 Units/Box 2500/Tape & Reel © Semiconductor Components Indust.

74LS139 Datasheet (Hitachi Semiconductor)

Hitachi Semiconductor

74LS139 Datasheet Preview

19.20 20.00 Max 16 9 7.40 Max 6.30 Unit: mm 1 1.3 1.11 Max 8 0.51 Min 2.54 Min 5.06 Max 7.62 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° Hitachi Code JEDEC EIAJ Weight (reference value) + 0.

s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the informat.

74LS139 Datasheet (National Semiconductor)

National Semiconductor

74LS139 Datasheet Preview

These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times In high-performance memory systems.

Y Y Y Y Y Y Y Designed specifically for high speed Memory decoders Data transmission systems LS138 3-to-8-line decoders incorporates 3 enable inputs to simplify cascading and or data reception LS139 contains two fully independent 2-to-4-line decoders demultiplexers Schottky clamped for high pe.

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