The 74LS251 is a LOW POWER SCHOTTKY.
| Package | PDIP |
|---|---|
| Mount Type | Through Hole |
| Pins | 16 |
| Operating Voltage | 5 V |
| Max Voltage (typical range) | 5.25 V |
| Min Voltage (typical range) | 4.75 V |
| Logic Function | Multiplexer |
| Height | 5.08 mm |
| Part Number | 74LS251 Datasheet |
|---|---|
| Manufacturer | onsemi |
| Overview | The LS251 is a logical implementation of a single pole, 8-position switch with the switch position controlled by the state of three Select inputs, S0, S1, S2. Both assertion and negation outputs are . allows multiplexer expansion by tying the outputs of up to 128 devices together. When the outputs of the 3-state devices are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. The Output Enable signals should be designe. |
| Part Number | 74LS251 Datasheet |
|---|---|
| Description | 1 of 8 Data Selectors/Multiplexers |
| Manufacturer | Hitachi Semiconductor |
| Overview | 19.20 20.00 Max 16 9 7.40 Max 6.30 Unit: mm 1 1.3 1.11 Max 8 0.51 Min 2.54 Min 5.06 Max 7.62 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° Hitachi Code JEDEC EIAJ Weight (reference value) + 0. s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the informat. |
| Part Number | 74LS251 Datasheet |
|---|---|
| Description | 3-STATE 1-of-8 Line Data Selector/Multiplexer |
| Manufacturer | Fairchild Semiconductor |
| Overview | These data selectors/multiplexers contain full on-chip binary decoding to select one-of-eight data sources, and feature a strobe-controlled 3-STATE output. The strobe must be at a low logic level to e. s 3-STATE version of DM74LS151 s Interface directly with system bus s Perform parallel-to-serial conversion s Permit multiplexing from N-lines to one line s Complementary outputs provide true and inverted data s Maximum number of common outputs: 129 s Typical propagation delay time (D to Y): 17 ns s. |
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