74LS251 Datasheet | Fairchild Semiconductor

DM74LS251 3-STATE 1-of-8 Line Data Selector/Multiplexer August 1986 Revised March 2000 DM74LS251 3-STATE 1-of-8 Line Data Selector/Multiplexer General Description These data selectors/multiplexers contain full on-chip binary decoding to select one-of-eight data sources, and feature a strobe-controlled 3-STATE output. The strobe must be at a low logic level to enable these devices. The 3STATE outputs permit direct connection to a mon bus. When the strobe input is HIGH, both outputs are in a highimpedance state in which both the upper and lower transistors of each totem-pole output are OFF, and the output neither drives nor loads the bus significantly. When the strobe is LOW, the outputs are activated and operate as standard TTL totem-pole outputs. To minimize the possibility that two outputs will attempt to take a mon bus to opposite logic levels, the output control circuitry is designed so that the average output disable time is shorter than the average output enable time. Features s 3-STATE version of DM74LS151 s Interface directly with system bus s Perform parallel-to-serial conversion s Permit multiplexing from N-lines to one line s plementary outputs provide true and inverted data s Maximum number of mon outputs: 129 s Typical propagation delay time (D to Y): 17 ns s Typical power dissipation: 35 m W Ordering Code: Order Number DM74LS251M DM74LS251N Package Number M16A N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Inputs Select C X L L L L H H H H B X L L H H L L H H A X L H L H L H L H Strobe S H L L L L L L L L Outputs Y Z D0 D1 D2 D3 D4 D5 D6 D7 W Z D0 D1 D2 D3 D4 D5 D6 D7 H = HIGH Logic Level L = LOW Logic Level X = Don't Care Z = High Impedance (OFF) D0, D1…D7 = The level of...